Analysis and Design of CMOS Ultra-Wideband Impulse-Radio Transceiver von Li Qiang

System Consideration and Front-End Integrated Circuits
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ISBN: 978-3-8383-6825-2
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The ultra-wideband (UWB) impulse-radio technology has unique features including high data-rate as well as low power consumption with ranging and localization capabilities. An UWB front-end, however, has to accommodate design challenges resulting from the exceptional wide bandwidth of several GHz. This book discusses the implementation issues of the UWB impulse-radio transceiver front-end, including the performance analysis of practical systems and the design of radio-frequency integrated circuits for transceiver front-ends. A general framework for performance evaluation of practical impulse radio system is proposed and demonstrated in scenarios of high-speed data communications as well as low-data-rate wireless body-area networks. An inductorless low- noise amplifier is designed with syncretic adoption of thermal noise canceling, capacitor peaking, and current reuse. The CMOS ransmit/receive switch design with highest reported bandwidth and power handling capability are discussed with customized transistor layout and triple-well resistive body- floating techniques. The prototypes have been demonstrated in state-of-the-art 130nm CMOS technology.

The ultra-wideband (UWB) impulse-radio technology has unique features including high data-rate as well as low power consumption with ranging and localization capabilities. An UWB front-end, however, has to accommodate design challenges resulting from the exceptional wide bandwidth of several GHz. This book discusses the implementation issues of the UWB impulse-radio transceiver front-end, including the performance analysis of practical systems and the design of radio-frequency integrated circuits for transceiver front-ends. A general framework for performance evaluation of practical impulse radio system is proposed and demonstrated in scenarios of high-speed data communications as well as low-data-rate wireless body-area networks. An inductorless low- noise amplifier is designed with syncretic adoption of thermal noise canceling, capacitor peaking, and current reuse. The CMOS ransmit/receive switch design with highest reported bandwidth and power handling capability are discussed with customized transistor layout and triple-well resistive body- floating techniques. The prototypes have been demonstrated in state-of-the-art 130nm CMOS technology.

AutorQiang, Li
EinbandKartonierter Einband (Kt)
Erscheinungsjahr2010
Seitenangabe192 S.
LieferstatusFolgt in ca. 10 Arbeitstagen
AusgabekennzeichenEnglisch
AbbildungenPaperback
MasseH22.0 cm x B15.0 cm x D1.2 cm 304 g
VerlagLAP Lambert Academic Publishing

Über den Autor Li Qiang

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